Special Conference Sessions

Speaker: Mark Gerber, Senior Director of Engineering and Technical Marketing, ASE (US) Inc.

Summary: 

Artificial intelligence, within the cloud space , is driving the industry to find new ways of offering the highest level of performance and power efficiency.   System level considerations are driving packaging from a single die package to multi-die and then modular based solutions.  With yield and cost pressures, more attention is being given to heterogeneous integration and new package structure options.  Sensor integration and other system level considerations are also driving new opportunities for additional features at the packaging level where integration is now leveraging module type component integration. Challenges including power delivery signal integrity, multi-physics impacts, IP block interface standards, chiplet manufacturing considerations, warpage and many others are driving the ecosystem to change to meet these new and evolving needs.  The traditional 2D mindset for silicon integration in packaging is rapidly changing and a 3D or vertical mindset is becoming a key driver for HPC, AI and is extending into mobile products. In this talk, I will discuss these challenges and also talk about how they impact the system level requirements as well as how the ecosystem can help participate to enable this new era.

Speaker: Dr. Jung H. Yoon, Distinguished Engineer & CTO Supplier Technology & Quality, IBM

Summary: 

This talk will provide unique technical insights into key driving forces that are supercharging exponential AI technology growth from an Infrastructure Hardware enablement perspective.  We will focus on AI centric driving forces centered at Bandwidth, Latency, Advanced Packaging, Sustainability, and Resilience. This is becoming a critical topic as the industry will need to ascertain technical roadmap in meeting customer needs focused on exponentially growing complex deep learning & AI workloads, across multi-Zeta byte big data.  We will discuss the needs, challenges, and future directions needed to enable next generation AI based HPC compute and data center – including Si scaling, heterogenous integration, thermal management, ECAT assembly, AOI/metrology, test & reliability. 

Speaker: Dr. Patrick Thompson, Distinguished Member Technical Staff, Texas Instruments

Summary: 

The terms advanced packaging, heterogeneous integration and 3D integration are ubiquitous today, as packaging has evolved from a primary role as an interconnect scale translator and vehicle for providing environmental protection for the functional device, to an equal partner in providing advanced semiconductor solutions. The vast majority of reports and articles cover the areas of high-performance computing (HPC) and high bandwidth memory. This is natural, as these applications use the most advanced technologies. However, other technologies are also using more advanced packaging technology relative to long standing solutions. High performance analog, and embedded processing solutions, especially for applications such as ADA systems for automotive, are increasingly using more advanced packaging solutions.

In this talk, I will discuss advanced packaging and package assembly to board approaches and challenges for package types frequently used for analog and embedded processing applications. Package types include WCSPs, lead frame packages, flip chip leadless, leaded and array packages multi-die/chiplet packages.

Speaker: Vivek Raghuraman, CEO/Co-founder, Mixx Technologies Inc

Summary: 

AI is driving the need for massive interconnectivity density and speed that is straining the current electrical-based ecosystem. Integrating optical interconnects using advanced packaging offers significant benefits but also presents critical challenges. Benefits include higher bandwidth density, reduced power consumption, and improved scalability compared with copper, enabling next-generation AI and high-performance computing systems. However, challenges such as thermal management, precise alignment of optical and electrical components, and maintaining signal integrity in compact layouts must be addressed. Manufacturing scalability is hindered by complex fabrication processes, impacting cost and yield. Reliability demands comprehensive testing and validation, while the lack of mature design tools, standards, and ecosystem coordination further complicates large-scale adoption. Overcoming these challenges is essential for unlocking the full potential of optical interconnects.

Speaker: Lars Böttcher, Group Manager, Fraunhofer IZM Berlin

Summary:

Power modules play a critical role in the efficient and reliable operation of various electrical systems, ranging from power systems to electric vehicles. 

To take advantage of the excellent switching characteristics of SiC at very low losses, the use of new packaging technologies is required. 

Embedding MOSFETs in PCB structures offers numerous advantages, including lower parasitic inductance, improved heat dissipation and enhanced switching performance. 

Concepts for realizing modules with embedding technology up to 900 V and 850 A are presented.

Speaker: Dr. Stefan Behrendt, Senior Research Engineer, Semikron Danfoss 

Summary: 

Automotive applications face the packaging of power electronic modules with a multitude of challenges. Small building spaces, high power densities, and high demands with regards to reliability generate the need for highly robust and cost effective bonding and joining technologies. Different packaging technologies as well as materials are critical factors for the performance and robustness of said power modules.

Speaker: Dr. Olaf Schoenfeld, Sales Manager, Zestron 

Summary: 

The assembly of sintered power module packages poses new challenges in terms of reliability. This is significantly influenced by stress factors during the manufacturing process and further processing for integration into the EV's power train. In the production process of power module packages, various process steps interface challenges can be identified that determine the yield. In addition, Mold delamination is discussed as a typical quality issue for the reliability of sintered power modules and the resulting failure modes under HV like Anodic migration. The presentation will highlight individual challenges for assembly interfaces and show an efficient solution to address these through a targeted surface treatment process. Results on surface analysis and stress test behavior underpin the presented approach.

Speaker: Frank Heidemann, Vice President & Technology Leader, Emerson Test & Measurement Business Group

Summary:

Reliable Silicon (Si) and Wide Bandgap (WBG) semiconductors are critical to the performance and longevity of EV power electronics. This presentation addresses the technical challenges in testing and validating these materials to meet AQG324 guidelines. Frank Heidemann will explore advanced testing methodologies, emphasizing the importance of understanding material properties, developing rigorous testing protocols, and defining reliability metrics. Attendees will gain insights into scalable and efficient system-level test strategies to overcome these challenges and ensure the long-term reliability of EV power electronics. This session is essential for professionals dedicated to advancing e-mobility technology.